 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| PRELIMINARY TECHNICAL DATA a Low Voltage 1.65 V to 3.6 V, (Up/Down) Logic Level Translation, Bypass Switch Preliminary Technical Data ADG3233* FEATURES Operates from 1.65 V to 3.6 V Supply Rails Bidirectional Level Translation, Unidirectional Signal Path 8 lead SOT23 and MicroSOIC Packages Bypass or Normal Operation Short Circuit Protection* LVTTL/CMOS-Compatible Inputs APPLICATIONS JTAG Chain Bypassing Daisychain Bypassing Digital Switching FUNCTIONAL BLOCK DIAGRAM VCC1 VCC1 A1 Y1 VCC2 VCC1 0 VCC1 VCC2 VCC2 Y2 A2 1 EN GND GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG3233 is a bypass switch designed on a sub micron process which operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages allowing bi-directional level translation, i.e. it translates low voltages to higher voltages and vice versa. The signal path is uni-directional, data may only flow from A to Y. This type of device may be used in applications that require a bypassing function. It is ideally suited to bypassing devices in a JTAG chain or bypassing devices in a daisychain loop. One switch could be used for each device or a number of devices thus allowing easy bypassing of one or more devices in a chain. This may be particularly useful in reducing the time overhead in testing devices in the JTAG chain or in daisy chain applications where the user does not wish to change the settings of a particular device. The Bypass Switch is packaged in two of the smallest footprints available for its required pin count. The 8 lead SOT23 package requires only 8.26mm2 board space, while the MicroSOIC package occupies approximately 15mm2 board area. *Patent Pending 1. 2. 3. 4. Level Translation. The Bypass Switch offers high performance and is fully guaranteed from 1.65 V to 3.6 V supply range. Short Circuit Protection Tiny 8 lead SOT23 package, 8.26mm2 board area, or 8 lead MicroSOIC. Table I. Truth Table EN L H Function A1 - Y2, Y1 = Hi-Z Enable Bypass Function A1 - Y1, A2 - Y2 Disable Bypass Function REV. PrE October 2002 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P Box 9106, Norwood, MA 02062-9106, U.S.A. .O. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 2002 PRELIMINARY TECHNICAL DATA ADG3233-SPECIFICATIONS1 (VCC1 = VCC2 = +1.65 to +3.6 V, GND = 0 V, All specifications TMIN to TMAX unless otherwise noted) Parameter LOGIC INPUTS/OUTPUTS Input High Voltage 3 Symbol Conditions Min Typ2 Max Units V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V (VCC2 = +1.65 to +3.6 V, GND = 0 V) VIH VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOH = -100 A, VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V VCC1 = 2.3 V to 2.7 V IOH = -4 mA, VCC1 = 1.65 V to 1.95 V IOH = -8 mA, VCC1 = 3.0 V to 3.6 V IOL = 100 A, VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOL = 4 mA, VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOL = 8 mA, VCC1 = 3.0 V to 3.6 V IOH = -100 A, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = -4 mA, VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = -8 mA, VCC2 = 3.0 V to 3.6 V IOL = 100 A, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOL = 4 mA, VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOL = 8 mA, VCC1 = 3.0 V to 3.6 V 1.35 1.35 0.65VCC -0.5 -0.5 -0.5 2.4 2.0 VCC - 0.45 2.0 VCC - 0.45 2.4 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 2.4 2.0 VCC - 0.45 2.0 VCC - 0.45 2.4 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 Input Low Voltage VIL 0.8 0.7 0.35VCC Output High Voltage (Y1) VOH Output Low Voltage (Y1) VOL 0.4 0.4 0.45 0.4 0.45 0.4 LOGIC OUTPUTS3 Output High Voltage (Y2) (VCC1 = +1.65 to +3.6 V, GND = 0 V) VOH Output Low Voltage (Y2) VOL 0.4 0.4 0.45 0.4 0.45 0.4 SWITCHINGS CHARACTERISTICS4,5 VCC = VCC1 = VCC2 = 3.3V 0.3 V Propagation Delay, tPD A1 to Y1 A2 to Y2 A1 to Y2 ENABLE Time EN to Y1 DISABLE Time EN to Y1 ENABLE Time EN to Y2 DISABLE Time EN to Y2 VCC = VCC1 = VCC2 = 2.5V 0.2 V Propagation Delay, tPD A1 to Y1 A2 to Y2 A1 to Y2 ENABLE Time EN to Y1 DISABLE Time EN to Y1 ENABLE Time EN to Y2 DISABLE Time EN to Y2 VCC = VCC1 = VCC2 = 1.8V 0.15 V Propagation Delay, tPD A1 to Y1 A2 to Y2 A1 to Y2 ENABLE Time EN to Y1 DISABLE Time EN to Y1 ENABLE Time EN to Y2 DISABLE Time EN to Y2 tPHL, tPLH tPHL, tPLH tPHL, tPLH tEN tDIS tEN tDIS CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 5 5 5 5 4 6 6 ns ns ns ns ns ns ns tPHL, tPLH tPHL, tPLH tPHL, tPLH tEN tDIS tEN tDIS CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 6 6 6 6 5 8 7 ns ns ns ns ns ns ns tPHL, tPLH tPHL, tPLH tPHL, tPLH tEN tDIS tEN tDIS CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 CL = 30 pF, VT = VCC/2 10 10 10 9 7 12 11 ns ns ns ns ns ns ns -2- REV. PrE PRELIMINARY TECHNICAL DATA SPECIFICATIONS1GND = 0 V, All specifications T (V = V = +1.65 V to +3.6 V, CC1 CC2 ADG3233 MIN to TMAX unless otherwise noted) Min Typ 2 Max 1 1 5 5 TBD TBD 1.65 1.65 3.6 3.6 5 5 100 Parameter Input Leakage Current Output Leakage Current Input Capacitance3 Output Capacitance3 Max Data Rate Jitter POWER REQUIREMENTS Power Supply Voltages Quiescent Power Supply Current Increase in ICC per input Symbol Conditions II IO CIN CO 0 VIN 3.6 V 0 VIN 3.6 V f = 1 MHz, VIN = VCC or GND f = 1 MHz, VIN = VCC or GND Units A A pF pF Mbps ps V V A A A VCC1 VCC2 ICC1 ICC2 ICC12 Digital Inputs = 0 V or VCC Digital Inputs = 0 V or VCC VCC = + 3.6 V, One input at 3.0 V; Others at VCC or GND NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 All typical vlaues are at VCC = V CC1 = VCC2, T A = +25C unless otherwise stated. 3 V IL and V IH levels are specified with respect to V CC1, while V OH and V OL levels for Y1 are specfied with respect to V CC1 and for Y2 with respect to V CC2 4 Guaranteed by design, not subject to production test. 5 See Test Circuits and Waveforms. Specifications subject to change without notice. REV. PrE -3- PRELIMINARY TECHNICAL DATA ADG3233 ABSOLUTE MAXIMUM RATINGS1 (TA = 25C unless otherwise noted) PIN CONFIGURATIONS 8 Lead SOT23 Package (RJ-8) VCC to GND . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +4.6 V Digital Inputs to GND . . . . . . . . . . . . . . . -0.5 V to +4.6 V DC Input Voltage . . . . . . . . . . . . . . . . . . . -0.5 V to +4.6 V DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150C 8 Lead microSOIC, JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . 43C/W 8 Lead SOT23, JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 211C/W Lead Temperature, Soldering (10seconds) . . . . . . . 300C IR Reflow, Peak Temperature (<20 seconds) . . . . +235C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this speci*cation is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. VCC1 1 A1 2 A2 3 EN 4 ADG3233 (Not to Scale) 8 VCC2 7 Y1 6 Y2 5 GND 8 Lead MicroSOIC Package (RM-8) VCC2 1 ADG3233 (Not to Scale) 8 VCC1 Y1 2 Y2 3 GND 4 7 A1 6 A2 5 EN ORDERING GUIDE Model Option ADG3233BRJ ADG3233BRM Temperature Range -40C to +85C -40C to +85C Package Description SOT23 MicroSOIC Branding W1B W1B Package RJ-8 RM-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3233 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. PrE PRELIMINARY TECHNICAL DATA ADG3233 TYPICAL PERFORMANCE CHARACTERISTICS TB D TB D TB D TPC 1. ICC vs. Input Signal Frequency. TPC 2. VCC Supply vs temperature TPC 3. Rise/Fall time vs capacitive load TB D TB D TB D TPC 4. Propagation Delay vs Temperature TPC 5. Propagation Delay vs Split Supply. TPC 6. Propagation delay vs capacitive load REV. PrE -5- PRELIMINARY TECHNICAL DATA ADG3233 VCC1 VCC1 INPUT t OUTPUT t PLH PHL VOH VT V OL A2 A1 0V VCC1 0V Y2 VT VOH VT VOL VT 0V EN t VT 0V EN t DIS VCC1 Figure 1. Propagation Delay VCC1 EN VT 0V t Y1 (A1 @ GND) EN VT t DIS VOH VT VOL Figure 3. Y2 Enable and Disable Times Figure 2. Y1 Enable and Disable Times DESCRIPTION The ADG3233 is a bypass switch designed on a sub micron process which operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages allowing bi-directional level translation, i.e. it translates low voltages to higher voltages and vice versa. The signal path is uni-directional, data may only flow from A to Y. A1 & EN Input Device 1 and back to the A2 input pin of the bypass switch. The logic level inputs of A2 are with respect to the VCC1 supply. The signal will be level translated from VCC1 to VCC2 and routed to the Y2 output pin of the bypass switch. Y2 output logic levels are with respect to the VCC2 supply. Bypass Operation The A1 and enable (EN) inputs have VIL/VIH logic levels so that it can accept logic levels of VOL/VOH from Device 0 or the controlling device independent of the value of the supply being used by the controlling device. These inputs (A1, EN) are capable of accepting inputs outside the VCC1 supply range. For example, the VCC1 supply applied to the Bypass switch could be 1.8V while Device 0 could be operating from a 2.5V or 3.3V supply rail, there are no internal diodes to the supply rails, so the device can handle inputs above the supply, but inside the absolute maximum ratings. Normal Operation Figure 5 illustrates the device as used in Bypass operation. The signal path is now from A1 directly to Y2, thus bypassing Device 1 completely. The signal will be level translated to a VCC2 logic level and available on Y2 where it may be applied directly to the input of Device2. In Bypass mode, Y1 is pulled up to VCC1. The three supplies in Figures 4 & 5 may be any combination of supplies, i.e. VCC0, VCC1 and VCC2 may be any combination of supplies, for example: 1.8, 2.5, 3.3V. Figure 4 shows the Bypass switch being used in Normal Mode. In this mode, the signal paths are from A1 to Y1 and A2 to Y2. The device will level translate the signal applied to A1 to a VCC1 logic level (this level translation can be either to a higher or lower supply) and route the signal to the Y1 output, which will have standard VOL/VOH levels for VCC1 supplies. The signal is then passed through -6- REV. PrE PRELIMINARY TECHNICAL DATA ADG3233 VCC0 VCC1 VCC2 DEVICE 0 SIGNAL INPUT DEVICE 1 DEVICE 2 SIGNAL OUTPUT VCC1 VCC2 A1 A2 Y1 Y2 LOGIC `1' EN BYPASS SWITCH Figure 4. Bypass Switch in Normal Mode VCC0 VCC1 VCC2 DEVICE 0 SIGNAL INPUT DEVICE 1 DEVICE 2 SIGNAL OUTPUT VCC1 VCC2 A1 A2 Y1 Y2 LOGIC `0' EN BYPASS SWITCH Figure 5. Bypass Switch in Bypass Mode REV. PrE -7- PRELIMINARY TECHNICAL DATA ADG3233 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead SOIC (RM-8) 0.122 (3.10) 0.114 (2.90) 8 5 0.122 (3.10) 0.114 (2.90) 1 4 0.199 (5.05) 0.187 (4.75) PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27 0.028 (0.71) 0.016 (0.41) 8-Lead SOT23 (RJ-8) 0.118 (3.00) 0.110 (2.80) 8 7 6 5 0.069 (1.75) 0.059 (1.50) 1 2 3 4 0.118 (3.00) 0.102 (2.60) PIN 1 0.026 (0.65) BSC 0.077 (1.95) BSC 0.051 (1.30) 0.035 (0.90) 0.006 (0.15) 0.000 (0.00) 0.057 (1.45) 0.035 (0.90) 0.015 (0.38) SEATING 0.009 (0.22) PLANE 10 0.008 (0.20) 0 0.004 (0.09) 0.022 (0.55) 0.014 (0.35) -8- REV. PrE |
Price & Availability of ADG3233
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |